Invalidate an instruction cache line.
If the instruction specified by the parameter adr is cached by the instruction cache, the cacheline containing that instruction is invalidated.
Note: The bottom 6 bits are set to 0, forced by architecture.
Prototype
void Xil_ICacheInvalidateLine(INTPTR adr);Parameters
The following table lists the Xil_ICacheInvalidateLine function arguments.
| Name | Description |
|---|---|
| adr | 64bit address of the instruction to be invalidated. |