XilFPGA BSP Configuration Settings - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2021-06-16
Version
2021.1 English

XilFPGA provides the following user configuration BSP settings.

Table 1. User Configuration BSP Settings
Parameter Name Type Default Value Description
secure_mode bool TRUE Enables secure Bitstream loading support.
debug_mode bool FALSE Enables the Debug messages in the library.
ocm_address int 0xfffc0000 Address used for the Bitstream authentication.
base_address int 0x80000 Holds the Bitstream Image address. This flag is valid only for the Cortex-A53 or the Cortex-R5F processors.
secure_readback bool FALSE Should be set to TRUE to allow the secure Bitstream configuration data read back. The application environment should be secure and trusted to enable this flag.
secure_environment bool FALSE Enable the secure PL configuration using the IPI. This flag is valid only for the Cortex-A53 or the Cortex-R5F processors.