#Define Xil_DCacheFlushRange - 2021.1 English

Xilinx Standalone Library Documentation OS and Libraries Document Collection (UG643)

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2021.1 English


Flush the Data cache for the given address range.

If the bytes specified by the address (adr) are cached by the Data cache, the cacheline containing that byte is invalidated. If the cacheline is modified (dirty), the written to system memory first before the before the line is invalidated.


The following table lists the Xil_DCacheFlushRange function arguments.

Table 1. Xil_DCacheFlushRange Arguments
Name Description
Addr Start address of range to be flushed.
Len Length of range to be flushed in bytes.