Utility Reduced Logic - 2020.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2021-01-04
Version
2020.2 English

This IP can be configured as AND, OR, and XOR functions. C_Size sets the number of inputs to the function, and must be at least 2. Refer to the LogiCORE IP Utility Reduced Logic Product Brief (PB045) for more information.

For example, setting the C_Size to 8 as an AND function creates one 8 input AND gate, with a single output, shown in the following figure.

Figure 1. Utility Reduced Logic IP Dialog Box