Limitations of Selectively Upgrading IP in Block Designs - 2020.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

Document ID
UG994
Release Date
2021-01-04
Version
2020.2 English

The following are the limitations of this feature:

  • The following IP are not supported in this feature. If these IP are used in a block design, they must be upgraded when migrating from an older release of Vivado.
    • Zynq
    • Zynq UltraScale+ MPSoC
    • AXI Interconnect
    • AXI SmartConnect
    • AXI4-Stream Interconnect
    • Block Memory Generator
    • Debug Bridge
    • GMII to RGMII
    • HDMI 1.4/2.0 Receiver Subsystem
    • HDMI 1.4/2.0 Transmitter Subsystem
    • ILA (Integrated Logic Analyzer)
    • IOModule
    • JESD204
    • JESD204 PHY
    • JTAG To AXI Master
    • MIPI CSI-2 RX Subsystem
    • System ILA
    • TMR Inject
    • Video Frame Buffer Read
    • Video Frame Buffer Write
    • Video PHY Controller
    • Video Test Pattern Generator
    • VIO (Virtual Input/Output)
  • RTL modules added to the block design cannot be opted out of upgrade.
  • The synthesis mode cannot be changed when using this feature. As an example, if the synthesis mode selected in the previous release of Vivado was Out-of-context per IP, then this mode cannot be changed to Global or Out-of-context per Block Design. In the GUI, the synthesis options cannot be changed as shown below.
Figure 1. Generate Output Products Dialog Box with Synthesis Options Disabled

  • The IP that have been chosen to be not upgraded or locked, cannot be parameterized. They cannot participate in parameter propagation. In other words, because the parameters of the IP are locked, they cannot be changed by other IP in the design. However, if the IP propagates parameters to other IP within the design, the parameters will be propagated.
Figure 2. Generate Output Products Command

  • The Tcl script for a block design containing locked IP cannot be generated using write_bd_tcl. If the user tries to do so, the following error message will be flagged.
    write_bd_tcl -force ./selective_upgrade/conf_mb_des_fg/config_mb.tcl
    
    ERROR: [BD 5-599] write_bd_tcl is not supported for block design with IP that have not been upgraded to their latest version. Please upgrade all the IP to their latest version.
    ERROR: [Common 17-39] 'write_bd_tcl' failed due to earlier errors.
  • User locked IP cannot be copied and pasted in the block design canvas.
  • Copying a block design that has locked IP using the command File > Save Block Design As cannot be done. If the user chooses to perform this action, the following error message will be flagged.
    ERROR: [BD 41-1179] The following IP in this design are locked. This command cannot be run until these IP are unlocked. Please run report_ip_status for more details and a recommendation on how to fix this issue. 
    /axi_ethernet_0
    /axi_ethernet_0_fifo
    
    ERROR: [Common 17-39] 'save_bd_design_as' failed due to earlier errors.