VHDL
Add the attribute to the architecture section as shown below.
architecture arch_impl of my_module is
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO of s_tready: SIGNAL is "xilinx.com:interface:axis:1.0
s_axi TREADY";
Verilog
Prefix the comment to the affected construct as shown below.
(* X_INTERFACE_INFO = "xilinx.com:interface:axis:1.0 s_axi TREADY" *)
output s_tready,