Revision History - 2020.2 English - Describes the recommended design methodology to achieve efficient utilization of Xilinx® FPGA device resources, and quicker design implementation and timing closure in Vivado® Design Suite. Provides the reasons behind the recommended method to support and enable informed design decisions.

Revision History - 2020.2 English - Describes the recommended design methodology to achieve efficient utilization of Xilinx® FPGA device resources, and quicker design implementation and timing closure in Vivado® Design Suite. Provides the reasons behind the recommended method to support and enable informed design decisions. - UG947

Vivado Design Suite Tutorial: Dynamic Function eXchange

Document ID

UG947

Release Date

2021-02-23

Version

2020.2 English

The following table shows the revision history for this document.

Section	Revision Summary
02/23/2021 v2020.2
Abstract Shell for Dynamic Function eXchange	New lab.
09/22/2020 v2020.1
Nested DFX	New lab.