Conclusion - 2020.2 English - Describes the recommended design methodology to achieve efficient utilization of Xilinx® FPGA device resources, and quicker design implementation and timing closure in Vivado® Design Suite. Provides the reasons behind the recommended method to support and enable informed design decisions.

Conclusion - 2020.2 English - Describes the recommended design methodology to achieve efficient utilization of Xilinx® FPGA device resources, and quicker design implementation and timing closure in Vivado® Design Suite. Provides the reasons behind the recommended method to support and enable informed design decisions. - UG947

Vivado Design Suite Tutorial: Dynamic Function eXchange

Document ID

UG947

Release Date

2021-02-23

Version

2020.2 English

This concludes Lab 9. In this lab, you:

Revisited the UltraScale+ version of a design with the Dynamic Function eXchange (DFX) Controller.
Implemented the parent configuration using the standard DFX project mode
Created Abstract Shells for each Reconfigurable Partition in the design
Implemented additional Reconfigurable Modules within these Abstract Shells
Generated partial bitstreams using two different methodologies