Supported Third-Party PCB Tools - 2020.2 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

Document ID
UG899
Release Date
2021-03-09
Version
2020.2 English

To optimize the I/O assignments within the context of the entire board, Xilinx also supports Cadence Allegro FPGA System Planner and Mentor Graphics I/O Designer. For more information, see the third-party tool documentation.