Timing - Critical Path - 2020.2 English

Vitis HLS Messaging (UG1448)

Document ID
UG1448
Release Date
2020-11-24
Version
2020.2 English

Description

The open_solution target will set the compiler in either Vitis mode or Vivado mode. This will change the default behavior of the tool as described in the table below.

Explanation

The following table lists the default behavior of the tool for the specified flow target.

open_solution -flow_target <vitis/vivado>

  Vivado Vitis
set_clock_uncertainty 27% 27%
config_compile -pipeline_loops 64 64
config_interface -m_axi_addr64 true true
config_schedule -enable_dsp_full_reg true true
config_compile -name_max_length 255 255
config_rtl -module_auto_prefix true true
config_export -vivado_optimization_level 0 0
config_export -vivado_phys_opt none none
config_rtl -register_reset_num 0 3
interface pragma defaults ip mode(does not have default interface feature) kernel mode
config_interface -m_axi_latency 0 64
config_interface -m_axi_alignment_byte_size 0 64
config_interface -m_axi_max_widen_bitwidth 0 512
config_interface -default_slave_interface none slave