Burst Inference Failure 11 - 2020.2 English

Vitis HLS Messaging (UG1448)

Document ID
UG1448
Release Date
2020-11-24
Version
2020.2 English

Explanation

Ensure that the data type of the top level interface ports uses a total number of bits that is a power of 2 (to avoid the addition of padding bits).

Example

constexpr uint64_t N = 64;
 
//////////// ORIGINAL ////////////
void example(ap_int<24> a[N], ap_int<24> b[N]) {
#pragma HLS INTERFACE m_axi port = a depth = N bundle = gmem0
#pragma HLS INTERFACE m_axi port = b depth = N bundle = gmem1
  ap_int<24> buff[N];
  for (size_t i = 0; i < N; ++i) {
#pragma HLS PIPELINE II = 1
    buff[i] = a[i];
    buff[i] = buff[i] + 100;
    b[i] = buff[i];
  }
}
 
//////////// UPDATED ////////////
// Replace with power of 2 bits type.
void example(int a[N], int b[N]) {
#pragma HLS INTERFACE m_axi port = a depth = N bundle = gmem0
#pragma HLS INTERFACE m_axi port = b depth = N bundle = gmem1
  int buff[N];
  for (size_t i = 0; i < N; ++i) {
#pragma HLS PIPELINE II = 1
    buff[i] = a[i];
    buff[i] = buff[i] + 100;
    b[i] = buff[i];
  }
}