Description
Auto frequency scaling failed. The system clock has an original frequency that exceeds the maximum frequency supported by the runtime.
Explanation
This message is intended to inform the programmer that the current system implementation is capable of operating at a higher frequency than the maximum frequency supported by the runtime. The compiler will not select a frequency higher than the runtime maximum.
If all design parameters are satisfied with this implementation, no further action is required. However, if the design requires too much area on the FPGA, it might be beneficial to change the system implementation and trade-off maximum implementation speed with resource requirements.
Recommendation
This design obviously has too much positive slack, which implies that more operations can potentially be scheduled in one cycle without impacting the target clock frequency. Try reducing the target frequency or reducing clock uncertainty while compiling.