Description
This rule checks and issues if there is low write bandwidth utilization of the associated DDR bank
Explanation
The write bandwidth utilization gives an indicator to the user that the kernel is not writing the data to the DDR at the maximum potential. This will have an impact on the time to write to the DDR.
The write bandwidth utilization is mainly dependent on transfer rate = Total Bytes transferred to the DDR per bus active time.
Resolution
To improve the read bandwidth utilization the user has to improve the Total Bytes transferred and decrease the maxi bus active time.
To improve the Total bytes transferred the user can increase the port width size on the interface to 512.
To improve the DDR per bus active time, the user should be doing more burst access instead of single access on the AXI.
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