Description
This message reports the average size in kilobytes transferred per write.
Explanation
PCIe® transactions from host to accelerator should be larger than ~1-2 Megabytes to ensure efficient bandwidth usage. Blocks smaller than this will accumulate extra overhead for data transfers. Blocks larger than this should be transferred optimally.
As
each accelerator board might have slightly different bandwidth requirements, Xilinx recommends running the getting_started/host/host_global_bandwith example on your accelerator
board.
Recommendation
If your algorithm is intended to work on smaller blocks of data, you should consider creating a wrapper which allows multiple datasets to be transferred together reaching the ideal transfer sizes.
As each accelerator board might have slightly different bandwidth requirements, Xilinx recommends running the
getting_started/host/host_global_bandwith
example on your accelerator board.