All timing analysis has been performed on -2M speed grade. The CAM clock domains are shown in the following table.
Clock | Description |
---|---|
s_axi_aclk | The AXI clock is used for table management. The AXI management interface has a completely asynchronous relationship with the lookup interface. |
key_clk | AXI4-Stream clock for Lookup Request/Response interfaces. |
ram_clk | The ram_clk is optional. It provides an option to clock the
internal RAM and match logic on a separate high frequency clock. In most cases, this
saves logic and memory resources. Guideline:
|