Simulation Completes But Fails - 2.6 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

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If the sample simulation completes with a failure, contact Xilinx technical support. Each release is tested prior to shipment and normally completes successfully. Consult the sample simulation log file for the expected behavior.

The simulation debug flow for Questa® Advanced Simulator is illustrated in the following figure. A similar approach can be used with other simulators.

Figure 1. Mentor Graphics Questa Advanced Simulator Simulation Debug Flow