Quantification Loss - 2.4 English

Ternary CAM Search LogiCORE IP Product Guide (PG318)

Document ID
PG318
Release Date
2022-11-08
Version
2.4 English

When an instance is generated, the total width of an entry is calculated:

Entry Width = 2*KEY_WIDTH + RESPONSE_WIDTH + PRIORITY_WIDTH + Valid

The key width is counted twice to accommodate for the ternary mask width. The valid bit adds one extra bit to the entry width. The total entry width is then mapped to the required number of block RAMs or URAMs necessary to read the entire entry in parallel. Block RAM and URAM are allocated in data width increments of 64 bits. To minimize quantification losses, it is beneficial if the entry size is close below or on a 64-bit boundary. For example, if the total entry size is 308 bits, the quantification loss is 12 bits per entry: 5*64 - 308 = 12.

The maximum supported entry widths are listed in the following table.

Table 1. Maximum Supported Entry Widths
DEPTH MEMORY_PRIMITIVE ENTRY_WIDTH
512 BLOCK 1536
1024 BLOCK 768 1
2048 BLOCK 384 1
2048 ULTRA 2048
4096 ULTRA 1024
8192 ULTRA 512
16384 ULTRA 256 1
  1. Not available for RAM_FREQ over 400 MHz.