1. Open the Vitis software platform in the PC
X-Ref Target - Figure 5-2 |
2. Go to File > New_Application_Project
X-Ref Target - Figure 5-3 |
3. Select a platform to create the project.
X-Ref Target - Figure 5-4 |
4. Select the required xsa.
X-Ref Target - Figure 5-5 |
5. Click Next .
X-Ref Target - Figure 5-6 |
6. Name the application.
X-Ref Target - Figure 5-7 |
7. Select the processor and click Next .
X-Ref Target - Figure 5-8 |
8. Select the empty application.
X-Ref Target - Figure 5-9 |
9. Import the required files.
X-Ref Target - Figure 5-10 |
10. Build the Project.
X-Ref Target - Figure 5-11 |
11. For the elf file, check the debug folder.
X-Ref Target - Figure 5-12 |
The example application design source files (contained within examples folder) are tightly coupled with the example design available in Vivado Catalog.
The v_frmbuf_rd_example.tcl and v_frmbuf_wr_example.tcl files automate the process of generating the downloadable bit and elf files from the provided example HDF file.
To run the provided Tcl script:
1. Copy the exported example design xsa file in the examples directory of the driver.
2. Launch the Xilinx Software Command-Line Tool (xsct) terminal.
3. cd into the examples directory.
4. Source the tcl file in xsct:
%>source vfrmbuf_xx_example.tcl
where xx is rd for Video Frame Buffer Read and wr for Video Frame Buffer Write.
5. Execute the script:
xsct%>vfrmbuf_xx_example <xsa_file_name.xsa>
The Tcl script performs the following:
• Create workspace
• Create hardware project
• Create Board Support Package
• Create Application Project
• Build BSP and Application Project
After the process is complete, the required files are available in:
bit file -> v_frmbuf_xx_exa/ folder
elf file -> v_frmbuf_xx_ex/sdk/xv_frmbuf_xx_example_1/{Debug/Release} folder
Next, perform the following steps to run the software application:
IMPORTANT: To do so, ensure that the hardware is powered on and a Digilent Cable or an USB Platform Cable is connected to the host PC. Also, ensure that a USB cable is connected to the UART port of the KC705 board.
1. Launch Vitis software platform.
2. Set workspace to vfrmbuf_xx_example.sdk folder in prompted window. The SDK project opens automatically. (If a welcome page displays, close it.)
3. Download the bitstream into the FPGA by selecting Xilinx Tools > Program FPGA . The Program FPGA dialog box opens.
4. Ensure that the Bitstream field shows the bitstream file generated by the Tcl script, then click Program .
Note: The DONE LED on the board turns green if the programming is successful.
5. A terminal program (such as HyperTerminal or Putty) is needed for UART communication. Open the program, choose appropriate port, set baud rate to 115200 and establish Serial port connection.
6. Select and right-click the application vfrmbuf_xx_example_design in Project_Explorer panel.
7. Select Run As > Launch on Hardware (GDB) .
8. Select Binaries and Qualifier in window and click OK .
The example design test result are shown in terminal program.
When executed on the board, the operations are listed in the readme.txt in the examples folder. Video inputs tested are 4Kp60, 4Kp30, 1080p, and 720p.