Stride (0x0020) Register - 2.4 English

Video Frame Buffer Read and Video Frame Buffer Write (PG278)

Document ID
PG278
Release Date
2022-05-11
Version
2.4 English

The stride determines the number of bytes between rows of pixels in memory. When a video frame is stored in memory, the memory buffer may contain extra padding bytes after each row of pixels. The padding bytes only affect how the image is stored in memory, but do not affect how the image is displayed.

Padding bytes is necessary to ensure that every row of pixels starts at an address that is aligned with the size of the data on the memory mapped AXI4 interface. Therefore, the stride value must be a multiple of the memory mapped AXI4 data size. The data size of the memory mapped AXI4 interface is 64* Samples per Clock bits, for example 64, 128, 256, or 512 bits for 1, 2, 4 and 8 samples per clock, respectively.