The Video Frame Buffer Read and Video Frame Buffer Write cores have been validated at Xilinx ® to represent many different parameterizations. A test design was developed for the core that incorporated a processor, AXI4-Lite interconnect, and various other peripherals. The processor was responsible for:
• Programing the video clock to match tested video resolution
• Configuring the video IP cores with different resolutions
• Launching the test
• Reporting the Pass/Fail status of the test and any errors that were found