Field ID (0x0048) Register - 2.4 English

Video Frame Buffer Read and Video Frame Buffer Write (PG278)

Document ID
PG278
Release Date
2022-05-11
Version
2.4 English

Field ID is used to identify if the field being read/written is even or odd. This register is only available with interlaced video. The register is R/W for the Frame Buffer Read, and Read only for the Frame Buffer Write.

Accessing 64-bit DDR Memory Location Perform the following to access 64-bit DDR memory location:

1. Change the IP address width to 64-bit in the IP GUI.

2. In Vivado ® address editor, unmap the HP0_DDR_LOW base name which has 0x0000_0000 offset address with 2G band.

3. Auto assign addresses to map DDR_LOW and DDR_HIGH address spaces for 64-bit mode.

4. Vivado will get DDR_HIGH offset address as 0x0000_0008_0000_0000 with 32G band. The IP can use any address as source/destination buffer address.