The HBM/DDR4 Binary CAM Search LogiCORE IP (HBM/DDR BCAM) implements an associative array data structure also known as a content-addressable memory using DRAM for storage. The HBM/DDR BCAM stores (key, response) entries with arbitrary key and response bit strings and allows the retrieval of the response based on an exact match of all bits in the search key with all bits in the key.
Important: The version of IP
described in this document supports HBM only and not DDR4. This can only be inferred from
within P4 code using the Xilinx
Vitis™
Networking P4 (VitisNetP4)
tool.