Transceiver Signaling - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

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2.1 English

To minimize consumption of routing resources, the various clock and data signals take on different functions depending on the configured DCMAC Subsystem operating mode. The following table details the meaning of the various clock and data signals for the given DCMAC Subsystem configuration settings. For FEC-only modes, data/clocks are shared with the transceiver interface.