Synthesizing and Implementing the Example Design - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

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2.1 English

To run synthesis and implementation on the example design in the Vivado Design Suite, perform the following steps:

  1. Go to the XCI file, right-click, and select Open IP Example Design. A new Vivado tool window opens with the project name example_project in the project directory.
  2. In the Flow Navigator, click Run Synthesis and Run Implementation
Tip: Click Run Implementation first to run both synthesis and implementation. Click Generate Bitstream to run synthesis, implementation, and then bitstream.
Note: For step-by-step guide to perform example design synthesis, implementation, and validation of the DCMAC Example Design on VPK120 board, see Example Design Creation, Simulation, and Device Image Generation sections in Versal Devices Integrated 100G Multirate Ethernet MAC (MRMAC) LogiCORE IP Product Guide (PG314).

The steps are similar for DCMAC Example Design.

Note: The core reset sequence is incorporated in the generated software C file.