Running a Simulation - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

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2.1 English
For any DCMAC Subsystem project generated out of the box, the simulations can be run in the following way.
  1. In the Sources Window, right-click the example project file (XCI), and select Open IP Example Design. The Vivado IP integrator block design-based example project is created.
  2. In the Flow Navigator (left-hand pane), under Simulation, right-click Simulation Settings. In the Settings window, set Target Simulator to Questa Advanced Simulator / Verilog Compiler Simulator (VCS) and then set the corresponding Compiled library location for the simulator.
  3. In the Flow Navigator pane, under Simulation, right-click Run Simulation and select Run Behavioral Simulation.
    Note: After the Run Behavioral Simulation option has run, you can observe the compilation and elaboration phase through the activity in the Tcl Console, and in the Simulation tab of the Log window.
  4. In the Tcl Console, type the run all command and press Enter. This runs the complete simulation as per the test case provided in example design test bench.
After the simulation is complete, the results can be viewed in the Tcl Console.