Revision History - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
Release Date
2.1 English

The following table shows the revision history for this document.

Section Revision Summary
04/12/2023 Version 2.1
Pause Operation Added the section
Entire document
  • Added updates related to 112G serial lane rate
  • General updates
01/27/2023 Version 2.1
Simulation Speed Up Added AMD Vivado™ Simulator.
Entire document General updates.
09/05/2022 Version 2.0
Initial release N/A