Pause Operation - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2023-04-12
Version
2.1 English
The DCMAC Subsystem provides a comprehensive mechanism for pause packet termination and generation in Coupled MAC+PHY mode exclusively. The TX and RX have independent interfaces for processing pause information as described in this section. The subsystem is capable of handling 802.3x and priority-based pause operation. The RX path parses pause packets and presents the extracted quanta on the rx_pause_quanta{0..8} buses. The TX path can accept pause packet requests from the pause interface and inject the requested packets into the data stream. Both global pause packets and priority-based pause packets are handled.
Note: 802.3x and global pause are used interchangeably throughout the document.