PTP 1588 Timer Syncer IP - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

Document ID
PG369
Release Date
2023-04-12
Version
2.1 English

The PTP 1588 Timer Syncer IP provides reference time to all the Ethernet ports in the example design. It implements an IEEE1588 real-time clock timer and can accurately recreate the 1588 timer in a local port’s clock domain.

Features

  • Can be configured as Master System Timer, Master System, and Port Timer
  • Supports the ToD (Sec – NanoSec) and Continuous/Correction Time (CF) formats
  • Implements External ToD bus interface logic for synchronization to high precision clock sources
  • Crosses System ToD to port timer’s clock domain
  • AXI4-Lite I/F for configuration and monitoring

For more information, see the PTP 1588 Timer Syncer IP section in Versal Devices Integrated 100G Multirate Ethernet MAC (MRMAC) LogiCORE IP Product Guide (PG314).