MAC Statistics TDM Interface - 2.1 English

Versal ACAP 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)

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2.1 English

MAC statistics for all supported 40 channels of the DCMAC Subsystem are relayed to user logic on the MAC statistics TDM ports, clocked by tx_axi_clk or rx_axi_clk, depending on direction.

In Independent MAC and PCS+FEC mode, each time frame data is relayed through the channelized segmented AXI4-Stream interface, a corresponding TDM cycle of MAC statistics is provided. There is no fixed timed relationship between the data and the statistics, but there is a 1:1 correspondence.

In Coupled MAC+PCS mode, the TDM MAC statistics are relayed in proportion to the configured port bandwidth (for example, 6x100GE sees the statistics of each port relayed once every six cycles).

The MAC statistics TDM ports consist of three output signal sets in each direction (RX and TX). An ID field is used to indicate the channel, a data bus relays the statistics information, and a valid bus qualifies everything on a cycle-by-cycle basis. The receive MAC statistics TDM data width is 79 bits while the transmit bus width is 56 bits.

The breakdown of the data bus into individual fields is described in the Register Space section.