- Supports 1 x 400GE, 3 x 200GE, 6 x 100GE, or combinations of 100 Gbps, 200 Gb/s, and 400 Gb/s totaling up to 600 Gbps
- User-side segmented AXI4-Stream interface at 390.625 MHz AXI4-Stream clock
- 40-channel time-sliced MAC capable of 600 Gbps operation
- Channelized option for time-sliced applications
- Up to 40 channels supported
- User-defined bandwidth allocation granularity
- 80-bit, 160-bit, or 320-bit interface to the serial transceiver
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IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems (IEEE 1588) 1-step and 2-step hardware timestamping at ingress and egress at full bit width
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Pause frame processing including priority-based flow control
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Optional built-in RS-FEC functionality