This section includes information about using AMD tools to customize and generate the subsystem in the AMD Vivado™ Design Suite.
If you are customizing and generating
the subsystem in the
Vivado IP integrator, see
the
Vivado Design Suite User Guide: Designing
IP Subsystems using IP Integrator (UG994) for
detailed information. IP integrator might auto-compute certain
configuration values when validating or generating the design. To
check whether the values do change, see the description of the
parameter in this chapter. To view the parameter value, run the
validate_bd_design
command in the Tcl
console.
You can customize the IP for use in your design by specifying values for the various parameters associated with the IP subsystem using the following steps:
- Select the IP from the IP catalog.
- Double-click the selected IP or select the Customize IP command from the toolbar or right-click menu.
For details, see the Vivado Design Suite User Guide: Designing with IP (UG896) and the Vivado Design Suite User Guide: Getting Started (UG910).
Figures in this chapter are illustrations of the Vivado Integrated Design Environment (IDE). The layout depicted here might vary from the current version. The following table shows the DCMAC Subsystem configurations that are supported in the Vivado IDE.
Configuration Type | DCMAC Operating Mode | PHY Operating Mode | Default PCS Mode | FEC Mode | GT Type |
---|---|---|---|---|---|
Static Configuration | Coupled MAC+ PCS | NA | 1 x 400GAUI-8 | RS(544) CL119 | GTM |
1 x 400GAUI-16 | RS(544) CL119 | GTM | |||
N x 200GAUI-4 (N=1 to 3) |
RS(544) CL119 | GTM | |||
N x 200GAUI-8 (N = 1 to 3) |
RS(544) CL119 | GTM | |||
N x 200GAUI-8 (N = 1) |
RS(544) CL119 | GTYP | |||
N x 100GAUI-2 (N =1 to 6) |
RS(544) CL91 RS(544) CL161 |
GTM | |||
N x 100GAUI-4 (N =1 to 6) |
RS(544) CL91 RS(544) CL161 |
GTM
|
|||
N x 100CAUI-4 (N =1 to 6) |
FEC Disabled RS(528) CL91 |
GTM | |||
N x 100GAUI-4 (N =1 to 2) |
RS(544) CL91 RS(544) CL161 |
GTYP | |||
N x 100CAUI-4 (N =1 to 2) |
FEC Disabled RS(528) CL91 |
GTYP | |||
1 x 400GAUI-4 | RS(544) CL119 | GTM | |||
N x 200GAUI-2 (N =1 to 3) |
RS(544) CL119 | GTM | |||
N x 100GAUI-1 (N =1 to 6) |
RS(544) CL91 RS(544) CL161 |
GTM | |||
1 x 400GAUI-8(Overclocking) | RS(544) CL119 | GTM | |||
N x 200GAUI-4(Overclocking) (N = 1 to 3) |
RS(544) CL119 | GTM | |||
N x 100GAUI-2(Overclocking) (N = 1 to 6) |
RS(544) CL91 RS(544) CL161 |
GTM | |||
N x 100GAUI-4(Overclocking) (N = 1 to 6) |
RS(544) CL91 RS(544) CL161 |
GTM | |||
N x 100GAUI-4(Overclocking) (N = 1 to 2) |
RS(544) CL91 RS(544) CL161 |
GTYP | |||
600G: Combination of 400G + 200G (With same serdes line rates in all 6 ports) |
RS(544) CL119 | GTM | |||
600G: Combination of 400G + 100G (With same Serdes line rates in all 6 ports) | For 400G: RS(544) CL119 For 100G: RS(544) CL91 RS(544) CL161 |
GTM | |||
600G: Combination of 200G + 100G (With same serdes line rates in all 6 ports) | For 200G: RS(544) CL119 For 100G: RS(544) CL91 RS(544) CL161 |
GTM | |||
Dynamic Configuration | Coupled MAC+PCS | NA | [PAM4 Switching OR NRZ Switching OR Mixed Switching] |
[Based on the Other PCS Modes, the valid FECs will be automatically configured] | GTM |
Static Configuration | Independent MAC and PCS+FEC | FEC Only 1 | 1 x 400G | RS(544) FlexO FOIC4.8-RS | |
N x 200G (N = 1,2,3) | RS(544) FlexO FOIC2.4-RS | ||||
N x 100G (N = 1 to 6) | RS(544) FlexO FOIC1.4-RS | ||||
1 x 400G | RS(544) CL119 | ||||
N x 200G (N = 1 to 3) | RS(544) CL119 | ||||
N x 100G (N = 1 to 6) | RS(544) CL91 | ||||
N x 100G (N = 1 to 6) | RS(528) CL91 | ||||
12x50G | RS(544) CL134 | ||||
6x128GFC | 128GFC | ||||
4x128GFC Wide | 128GFC | ||||
PCS Only 1 | 1 x 400G | ||||
N x 200G (N = 1 to 3) | |||||
N x 100G (N = 1 to 6) | |||||
600G: Combination of 400G and 200G OR 400G and 100G OR 200G and 100G |
|||||
PHY Disabled
1
(MAC Only) |
|||||
|
- Mixing of different line rate configurations such as the following are
not supported in example design:
- Port0: 53G, Other Ports: 26G / 25G
- Port0: 26G, Other Ports: 53G / 25G and so on
- In-between port disabled configurations are not supported in the example design.
Select the DCMAC Subsystem from the IP catalog. A window opens with the different configurations organized in tabs, as shown in the following images.