User Interface - 2.1 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

Document ID
PG314
Release Date
2023-07-11
Version
2.1 English

GT Serdes pins and clock interface pins.

Table 1. User I/O Ports
Name Size I/O Description
gt_ref_clk_p 1 I Differential input clk to GT.
gt_ref_clk_n 1 I Differential input clk to GT.
gt_rxp_in 4 I Differential serdes input to GT
gt_rxn_in 4 I Differential serdes input to GT
gt_txp_out 4 O Differential serdes output from GT
gt_txn_out 4 O Differential serdes output from GT