Important: The design must meet
the following rules when connecting the Versal
MRMAC Hard IP core to the transceivers:
- GTs have to be contiguous.
- For MRMAC operating in wide SerDes mode (CTL_SERDES_WIDTH_[0..3]<2> == 1), the MRMAC and connected GT Site (GTY_QUAD/ GTYE5_QUAD/ GTME5_QUAD) instance should be placed within the same Clock Region.
- For MRMAC operating in narrow SerDes mode (CTL_SERDES_WIDTH_[0..3]<2> == 0), the MRMAC and connected GT Site (GTY_QUAD/ GTYE5_QUAD/ GTME5_QUAD) instance should be placed either within the same Clock Region, or one horizontal Clock Regions above or below the MRMAC instance.
- MRMAC 100GE, 40GE mode should use four contiguous GTs (GTY/GTYP/GTM) and 50GE should use two contiguous GTs (GTY/GTYP/GTM) from the same GTYE5_QUAD/ GTME5_QUAD.
Note: Apart from the previously mentioned rules, it is not recommended to place MRMAC
and GT Site ( GTY_QUAD/GTYE5_QUAD/GTME5_QUAD) in horizontally opposite
locations. However, in extreme cases, when a user has to intentionally violate
one or more than one of the said rules, timing violation may occur, and it is
the user's responsibility to resolve it. Although not guaranteed, the user can
explore options like adding pipeline registers between MRMAC and GT in such
cases.