Statistics Monitoring - 2.1 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

Document ID
PG314
Release Date
2023-07-11
Version
2.1 English

Each MRMAC port contains an internal statistics engine which monitors packet histogram statistics, as well as internal error statistics. The internal counters for the statistics are 48 bits wide and saturate when full.

A tick mechanism is used to snapshot the internal counter values and to place them in a set of accessible statistics registers. The values remain in the user-accessible registers until a subsequent tick overwrites the values with fresh data. The tick event also resets the internal counters to zero. In this method, the snapshot counter values represent a count of events which have occurred in the interval between tick events, making it easier to window the statistics. A tick event on a port does not affect the statistic engines or user registers of any other port.

A tick event can be triggered by asserting a rising edge on the per-port pm_tick input pin for a given port, or by writing a 1 to the tick register of a given port through the AXI4-Lite interface. Tick mode can be set to register instead of pm_tick input pin by writing "1" to MODE register tick_reg_mode_sel_<N> of the respective port.

Transferring data from the internal statistics engine to the user register space takes a number of clock cycles. Completion of the update process is indicated by the rising edge of the AXI4-Lite interface's pm_rdy pin. During the transfer, the port's statistics counters are invalid and should not be read.

When a snapshot is completed, the counter values are accessible on the 32-bit AXI4-Lite port where the LSB 32-bit is stored at address b000 and the MSB 32-bit is stored at address b100.

For the purposes of TX statistics, good packets are defined as packets without FCS or other errors. Bad packets are defined as packets with FCS or any other error.

For the purposes of RX statistics, good packets are defined as packets without FCS or other errors including length error. Bad packets are defined as packets with FCS or any other error. The length field error includes length field error, oversize, and undersize packets.