Example 3a
- 4 × 10/25GE (4 × 10.3125/4 × 25.78 Gb/s)
- PCS Only
- Low Speed AXI Operating Mode
Figure 1. Example Diagram 3a
Example 3b
- 4 × 28.21GE
- FEC Only Operating Mode
In the example diagram 3b, the 28.05 Gb/s Data out 80 @ 350.62 MHz. TX/RXOUTCLK is ×2 data rate and local /2 bufg in RCLK region generates the clock to capture the SerDes Data.
Figure 2. Example Diagram 3b