Overview - Overview - 2.0 English - PG468

The DRAM Semi-Ternary CAM (DSTCAM) Search AMD LogiCORE™ IP is related to the on-chip STCAMs provided by AMD, see Semi-Ternary CAM Search LogiCORE IP Product Guide (PG319). DSTCAM uses dynamic random access memory (DRAM) as storage for entries, whereas on-chip STCAM uses FPGA's internal SRAM. This enables DSTCAM to store much more entires. DSTCAM is a member of the family of CAMs provided by AMD. The CAM family consists of the following members:

Binary CAM (BCAM)

Used for exact matching, BCAM is available in two versions. A software-managed version and a hardware-managed version (CBCAM). CBCAM offers you the flexibility to insert or delete entries using a hardware interface with or without a software driver. For more information, see Binary CAM Search LogiCORE IP Product Guide (PG317).

Cached DRAM Binary CAM (CDBCAM)

Used for exact matching, CDBCAM is similar to BCAM except that it uses DRAM as the primary storage for entries, whereas BCAM uses UltraRAM (URAM) or block RAM (BRAM). CDBCAM can store more entries, and, in combination with its on-chip BCAM cache, it can achieve lookup rates comparable to the BCAM. Similar to the BCAM, the CDBCAM supports both a software managed and hardware managed interface. For further information, see Cached DRAM Binary CAM LogiCORE IP Product Guide (PG427).

DRAM Semi-Ternary CAM (DSTCAM)

Described in this document, DSTCAM is fully flexible in terms of number, size and position of wildcard (ignored) fields. Every key bit has a corresponding mask bit. The number of allowed unique masks is however limited. This allows for considerable memory and logic optimizations. For LPM applications, DSTCAM uses special hardware to compress keys, which improves storage efficiency. The LPM mode uses prefix masks instead of fully flexible masks, which reduces cost. DSTCAM is designed to operate with variable rate and latency optimizing the average rate.

Semi-Ternary CAM (STCAM)

STCAM is available in two versions, one with fixed rate and latency and the other with variable rate and latency for low-cost applications. The variable-rate STCAM is similar to the DSTCAM except that it uses Block RAM (BRAM) or UltraRAM (URAM) to store the entries, whereas DSTCAM uses DRAM. For more information, see Semi-Ternary CAM Search LogiCORE IP Product Guide (PG319).

Ternary CAM (TCAM)

The primary usage of TCAM is tables requiring full flexibility in terms of size and position of wildcard (ignored) fields. Every key bit has a corresponding mask bit stored together with the key. All entries can have different masks. TCAMs are used for Access Control List (ACL) type of lookups, requiring a large number of different masks. For more information, see Ternary CAM Search LogiCORE IP Product Guide (PG318).

One or multiple instances of each type can be used inside the same FPGA. Different types can also be mixed inside the same FPGA. Each CAM type is optimized for its specific task in terms of hardware resource usage.

The Lookup interface of the DSTCAM receives a lookup key and outputs a result that contains a match flag indicating whether the masked lookup key matches the masked key of any entry in the DSTCAM. The width of the mask is the same as the key width. A cleared mask bit invalidates the corresponding key bit and ignores it. Both the lookup key and the stored key are bit-wise ANDed with the mask prior to the bit-wise matching.

If multiple entries are matched, the response value of the matching entry with the lowest priority is output. If two entries have the same priority, one of them is arbitrarily picked as the winner. The API software ensures that two entries with the same masked key cannot be inserted.

The entries are read and written using a driver consisting of a set of high-level API functions. The API functions are written in C and delivered as part of the IP. The API encapsulates the details of memory management and register access and provides a simple and efficient software interface. The API software with detailed documentation is found on the CAM IP product page. You must add the basic hardware read and write functions to the API. This allows for flexible hardware mapping and consequently, the communications link between the API software and the hardware adapts to the your desired specifications. The communication link could be, for instance, AXI4-Lite or PCIe® .

Following are the main functions of the DSTCAM API:

• stcam_create
• stcam_destroy
• stcam_insert
• stcam_delete
• stcam_update

Arguments for stcam_insert, stcam_delete, stcam_update are:

• key
• mask
• priority
• response

LPM mode uses a simplified API using prefix length instead of the mask and priority arguments. For LPM mode, the main functions are:

• lpm_create
• lpm_destroy
• lpm_insert
• lpm_delete
• lpm_update

The driver maintains a CPU shadow of the CAM Database. This way high latency read operations to the CAM Database from the CPU is eliminated. It also allows for testing the interaction between control plane and driver without any hardware.

A DSTCAM design is highly configurable at compile time, which makes it suitable for a large variety of applications. For LPM mode most configuration parameters can be omitted. The reduced set of parameters can be found in the subsequent table. The following table lists the configuration parameters.

You must manually set these configuration parameters prior to generating the DSTCAM hardware or calling the software DSTCAM API. Ensure that the parameters used to generate the hardware DSTCAM and the parameters used to call the software DSTCAM are identical.