Memory Specification Tab - Memory Specification Tab - 2.0 English - PG468

DRAM Semi-Ternary CAM 2.0 LogiCORE IP Product Guide (PG468)

Document_ID
PG468
Release_Date
2026-01-30
Version
2.0 English
Figure 1. HBM Configuration Parameters Generated by Your Tool
Figure 2. DDR4 Configuration Parameters Generated by Your Tool
Figure 3. LPDDR5 Configuration Parameters Generated by Your Tool
DRAM Memory Type
Choice of HBM, DDR4, or LPDDR5 (device dependent).
Number of PCs
Determined by key width, response width, and number of entries. The number of PCS can be increased above the minimum.
Note: This parameter is only applicable to devices using HBM.
Modify Minimum Number of PCs
Modify the minimum number of PCs for better lookup performance.
Note: This parameter is only applicable to devices using HBM.
Dedicated PC
Use if not sharing HBM PCs with other blocks for higher lookup rate. When enabled, if the table footprint of entries is smaller than the selected number of PCs, the table footprint are expanded to fill the available space. Otherwise, only the table footprint based on number of entries are occupied.
Note: This parameter is only applicable to devices using HBM.
Number of NoC NMUs
The number of NoC NMU interfaces used for DDR. When you use HBM, you can customize the number of NoC NMU interfaces. Allowed NMUs are PCs × 0.5, PCs × 1, and PCs × 2.
Customize NoC NMUs
Customize the default number of NoC NMUs for better resource utilisation.
Required DRAM Size
This is not a configurable parameter, but it provides a calculation of the minimum DRAM size required to fulfil the number of entries entered, with the key and response widths considered.
DRAM Size per PC
This is not a configurable parameter, but it provides the DRAM size required for the current configuration per PC.