The following sections show the example design block designs for both DDR and HBM:
DDR Memory
Figure 1. Example Design for DDR Memory
Address translation to DDR memory is performed by axi_noc_0.
The configuration depicted in the following figure could be used as a reference for remapping.
Figure 2. Remapping Reference (DDR)
HBM
Figure 3. Example Design for HBM
Address translation to HBM is performed by axi_noc_0.
The configuration depicted in the following figure could be used as a reference for remapping.
Figure 4. Remapping Reference (HBM) for Two PCs and Four NMUs
Figure 5. Remapping Reference (HBM) for Four PCs and Two NMUs
Figure 6. Remapping Reference (HBM) for Four PCs and Four NMUs
LPDDR5 Memory
Figure 7. Example Design for LPDDR5 Memory
Figure 8. Remapping Reference (LPDDR5)