Interface Specification Tab - Interface Specification Tab - 2.0 English - PG427

Cached DRAM Binary CAM 2.0 LogiCORE IP Product Guide (PG427)

Document_ID
PG427
Release_Date
2025-11-26
Version
2.0 English
Figure 1. Interface Specification

Lookup Interface Frequency
Sets the lookup clock to between 15 MHz and 400 MHz
Clocking Mode
The use of a separate memory clock is optional. In SINGLE_CLOCK mode all logic (except a small amount of control logic on the AXI4-Lite domain) is clocked on the lookup interface clock.
Memory Interface Frequency
Sets the memory interface frequency to a value between 15 and 400 MHz.