The following sections show the example design block designs for both DDR and HBM:
DDR Memory
Figure 1.
CDBCAM Example Design for
DDR Memory
Address translation between CDBCAM and DDR memory is performed
by axi_noc_0.
The configuration depicted in the following figure could be used as a reference for remapping.
Figure 2. Remapping Reference (DDR)
HBM
Figure 3.
CDBCAM Example Design for
HBM
Address translation between CDBCAM and HBM is performed by
axi_noc_0.
The configuration depicted in the following figure could be used as a reference for remapping.
Figure 4. Remapping Reference (HBM) for Two PCs and Four NMUs
Figure 5. Remapping Reference (HBM) for Four PCs and Two NMUs
Figure 6. Remapping Reference (HBM) for Four PCs and Four NMUs
LPDDR5 Memory
Figure 7. CDBCAM Example Design for DDR Memory
Figure 8. Remapping Reference (LPDDR5)
