The Periodical Event Counter (PEC) stores a count of events. An event is represented as a 1-bit input port that is active-High for one clock cycle, causing a 32-bit count register to increment by one.
For each event counter, there is a corresponding AXI4-Lite-accessible 32-bit register. For all sample rates except the SW Sample Mode (see the following table), the six most significant bits of the register are the sample number, and the remaining 26 bits are the count itself. The sample number value is incremented by 1 at a sampling rate set by the user. If a new sampling rate is programmed, then the sample number resets to zero. At each sampling rate interval, the counter is sampled, moved to the AXI4-Lite-accessible register and cleared.
The value of the event counted in the previous sampling period is stored in an AXI4-Lite-accessible register for the duration of the sampling period, after which it gets overwritten by a new counter value. For a sampling period of 100 ms and 1s, the count is divided by a value of 16.
The following table details how the sample rate can be set.
| Sample Rate | Comment |
|---|---|
| 1 μs | [31:26] – sample number [25:0] – counter value |
| 10 μs | [31:26] – sample number [25:0] – counter value |
| 100 μs | [31:26] – sample number [25:0] – counter value |
| 1 ms | [31:26] – sample number [25:0] – counter value |
| 10 ms | Default [31:26] – sample number [25:0] – counter value |
| 100 ms | [31:26] – sample number [25:0] – counter value divided by 16 |
| 1 s | [31:26] – sample number [25:0] – counter value divided by 16 |
| SW Sample mode | Samples event counts since the last statistics read. Saturates at 232-1. |
The sampling rate can be set by calling the SW API driver function
bcam_set_stats_interval(). As shown in the previous table, the
software sampling mode can be set. In this mode, there is no concept of a sampling
period or timestamp. The count register is sampled and then cleared when you issue a
read over AXI4-Lite. The returned value is a 32-bit count value.