Configuration Example - 1.2 English - PG427

Cached DRAM Binary CAM LogiCORE IP Product Guide (PG427)

Document ID
PG427
Release Date
2024-11-27
Version
1.2 English

The performance of the following configuration is 1.5M inserts per second:

  • Key width = 128, Response width = 64
  • NUM_ENTRIES = 1.5M
  • CAM database is empty and then filled with 1.5M entries
  • CPU=i7-7600U, 2.80 GHz. 4 MB 16-way set associative shared cache