The below table shows the GT serdes and clock interface pins. The below set of pins are exposed for each GT quad used by the configuration. N is the gt quad number starting from 0.
| Name | Size | I/O | Description |
|---|---|---|---|
| gt_ref_clk_n_<N> | 1 | I | Differential input clock to the GT. |
| gt_ref_clk_p_<N> | 1 | I | Differential input clock to the GT. |
| GT_Serial_<N>_grx_n | 4 | I | Differential Serial input to the GT |
| GT_Serial_<N>_grx_p | 4 | I | Differential Serial input to the GT |
| GT_Serial_<N>_gtx_n | 4 | O | Differential serial output from the GT |
| GT_Serial_<N>_gtx_p | 4 | O | Differential serial output from the GT |