Reduced Fabric Interface Rates Example 2 - 1.2 English

Versal ACAP Integrated 600G Interlaken with FEC Subsystem Product Guide (PG371)

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1.2 English

When the 24 x 12.5 Gb/s configuration with 768-bit AXI4-Stream interface is used and two lanes are decommissioned (that is, 22 x 12.5 Gb/s), the AXI and core clocks need to be 391 MHz and 586 MHz respectively. If the same configuration is used and six lanes are decommissioned (that is, 18 x 12.5 Gb/s), the AXI clock and core clock can run at lower frequencies of 293 MHz and 440 MHz respectively.