Statistics Counters - Statistics Counters - 1.2 English - PG251

The statistics counters provide histograms of the classification of traffic and error counts. These counters can be read either by a 1 on pm_tick or by writing a 1 to TICK_REG, depending on the value of MODE_REG[30] (that is, tick_reg_mode_sel). pm_tick will be used when MODE_REG[30] = 0 and TICK_REG will be used when MODE_REG[30] = 1 (1 =default).

The counters employ an internal accumulator. A write to the TICK_REG register causes the accumulated counts to be pushed to the readable STAT_*_MSB/LSB registers and simultaneously clear the accumulators. The STAT_*_MSB/LSB registers can then be read. In this way all values stored in the statistics counters represent a snap-shot over the same time interval.

The STAT_CYCLE_COUNT_MSB/LSB register contains a count of the number of RX core clock cycles between TICK_REG writes. This allows for easy time-interval based statistics.

Statistic counter registers are cleared according to the following conditions:

• Applying s_axi_aresetn clears both TX and RX statistics counter registers
• Applying PM Tick clears both TX and RX statistics counter registers
• Applying rx_reset clears the RX statistics counter registers only
• Applying tx_reset clears the TX statistics counter registers only