Setting Up the ZCU102/104 Evaluation Board - 1.1 English

Vitis AI User Guide (UG1414)

Document ID
UG1414
Release Date
2020-03-23
Version
1.1 English

The Xilinx ZCU102 evaluation board uses the mid-range ZU9 Zynq® UltraScale+™ MPSoC to enable you to jumpstart your machine learning applications. For more information on the ZCU102 board, see the ZCU102 product page on the Xilinx website: https://www.xilinx.com/ products/boards-and-kits/ek-u1-zcu102-g.html.

Note: You may need to run command irps5401 to trigger the power management patch for ZCU104 to avoid system hang or power off issue when running Vitis™ AI examples.

The main connectivity interfaces for ZCU102 are shown in the following figure.

Figure 1. Xilinx ZCU102 Evaluation Board and Peripheral Connections

The Xilinx ZCU104 evaluation board uses the mid-range Zynq UltraScale+ device to enable you to jumpstart your machine learning applications. For more information on the ZCU104 board, see the Xilinx website: https://www.xilinx.com/products/boards-and-kits/zcu104.html.

The main connectivity interfaces for ZCU104 are shown in the following figure.

Figure 2. Xilinx ZCU104 Evaluation Board and Peripheral Connections