The c0_ctl_tx_serdes_intf_mode[0] bit and
c0_ctl_rx_serdes_intf_mode[0] bit select the GT interface to
operate in a narrow interface width compared with a wider x2 interface width.
When configured in narrow interface mode for Interlaken mode, the GT interface
is clocked by the tx_serdes_clk[0] in the TX path and by
rx_serdes_clk[0] in the RX path. The data flowing
between the GT and ILKNF is clocked by those
clocks. Internal to the ILKNF subsystem, the
lane logic is clocked by those same clocks.
When configured in x2 width (that is, wide) mode for Interlaken mode, the GT
interface is clocked by tx_alt_serdes_clk[0] in the TX
path and by rx_alt_serdes_clk[0] in the RX path. The
data flowing between the GT and ILKNF is
clocked by those clocks. In addition, the tx_serdes_clk[0] (whose frequency is exactly double the tx_alt_serdes_clk[0] frequency) is passed from the GT to
the ILKNF subsystem. Similarly, the rx_serdes_clk[0] (whose frequency is exactly double the
rx_alt_serdes_clk[0] frequency) is also passed from
the GT to the ILKNF subsystem. Internal to
the ILKNF subsystem, the lane logic uses the
faster clocks.