Features - 1.1 English

PG285 Gamma Look Up Table
Document ID
PG285
Release Date
2022-05-11
Version
1.1 English

• Programmable gamma table supports gamma correction or any user defined function

• Three channel independent look-up table structure

• One, two, four or eight pixel-wide AXI4-Stream video interface

• 8 and 10 bits per component support

• Supports spatial resolutions from 64 x 64 up to 8192 x 4320

• Supports 8K60 in all supported device families (1)

LogiCORE IP Facts Table

Core Specifics

Supported Device Family ( 1 )

Versal® ACAP, UltraScale+™ Families,

UltraScale™ Architecture, Zynq ® -7000 , 7 Series

Supported User Interfaces

AXI4-Lite, AXI4-Stream ( 2 )

Resources

Performance and Resource Utilization web page

Provided with Core

Documentation

Product Guide

Design Files

Not Provided

Example Design

Yes

Test Bench

Not Provided

Constraints File

XDC

Simulation Models

Encrypted RTL, VHDL or Verilog Structural

Supported Software Drivers ( 3 )

Standalone, V4L2

Tested Design Flows ( 4 )

Design Entry Tools

Vivado ® Design Suite

Simulation

For supported simulators, see the Xilinx Design Tools: Release Notes Guide .

Synthesis Tools

Vivado Synthesis

Support

Release Notes and Known Issues

Master Answer Record: 68768

All Vivado IP Change Logs

Master Vivado IP Change Logs: 72775

Xilinx Support web page

1. For a complete listing of supported devices, see the Vivado IP Catalog.

2. Video protocol as defined in the Video IP: AXI Feature Adoption section of AXI Reference Guide [Ref 1] .

3. Standalone driver details can be found in the Vitis™ directory (<install_directory>/Vitis/<release>/data/embeddedsw/doc/xilinx_drivers.htm). Linux OS and driver support information is available from the Linux Gamma LUT Driver page .

4. For the supported versions of the tools, see the Xilinx Design Tools: Release Notes Guide .

1. Performance on low power devices might be lower.