Lookup Performance
High capacity CDBCAM systems consists of a high capacity DBCAM and a lower capacity BCAM Cache Subsystem (BCS). The DBCAM uses DRAM for storage and has a higher latency and has a generally lower lookup rate than the on-chip BCAM. The BCS provides lower latency and a high lookup rate on-chip cache BCAM. The resulting lookup rate of such a system is inversely proportional to the Cache Miss Rate (CMR), but it cannot go beyond the maximum lookup rate of the BCS, hence the resulting lookup rate can be expressed by the formula:
-
LR = CLR, for CLR*CMR
< DLR. Note: To achieve this rate, the AXI4-Stream rate must be higher than LR.
- LR = DLR/CMR, for CLR*CMR > DLR.
where:
- LR is a resulting lookup rate;
- CLR is a cache (BCS) lookup rate;
- DLR is a DBCAM lookup rate;
- CMR is a cache (BCS) miss rate. For example, for 1 in 10 lookups being a miss, the CMR would be 0.1.
The expected performance is the function of 3 variables, where one of them is lookup flow content dependent. To visualize the expected performance, the graph below illustrates a typical case with the following characteristics as a function of the cache (BCS) miss rate:
- CLR = 150 M lookups/s
- DLR = 39 M lookups/s
DBCAM Lookup Throughput Performance
Because the resulting lookup performance depends on DBCAM lookup performance, below are some examples of achievable DBCAM performance.
| DRAM Type | DBCAM Entry Size 1 [B] | Mean DLR [Mlookups/s] | Mean Lookup Latency [us] |
|---|---|---|---|
| DDR4 | 64 | 28 | 0.68 |
| DDR4 | 128 | 23 | 0.75 |
| HBM | 64 | 39 | 0.75 |
| HBM | 128 | 28 | 1.17 |
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