The Cached DRAM Binary CAM AMD LogiCORE™ IP (CDBCAM) implements an associative array data structure also known as a content-addressable memory. The CDBCAM stores (key, response) entries with arbitrary key and response bit strings, and it allows the retrieval of the response based on an exact match of all bits in the search key with all bits in key.
After setting parameters up, the CDBCAM IP GUI can generate the CDBCAM IP instance to be instantiated in the design. An alternative method is to use AMD Vitis™ Networking P4 and create and instantiate the CDBCAM IP by using the Vitis Networking P4 GUI and P4 language code.